1. Field of the Invention
The present invention generally relates to communications in an ATM (Asynchronous Transfer Mode), and more particularly to multiplexing and demultiplexing of a short cell suitable for a low-bit-rate transfer of information, such as compressed and encoded voice information.
In a communication in the ATM, information is provided in a payload field of an ATM cell and is transferred. The ATM cell is assigned identification information for each connection. The identification information includes a VPI (Virtual Path Identifier) and a VCI (Virtual Channel Identifier). In other words, one ATM cell to be transferred over an ATM transmission line has information concerning one connection.
The ATM transfer can be realized in a mobile communication system using a radio wave. In such a mobile communication system, information to be transmitted is compressed and encoded in order to efficiently utilize the communication band. For example, compressed and encoded information has a bit rate of, for example, 8 kbps. If such a low-bit-rate information is transferred by using the ATM cell, it will take a very long time to assemble and send one ATM cell. This greatly degrades the advantages of the ATM transfer. The ITU-T has studied an improved transfer method directed to overcoming the above problem. For example, a short cell (having a length shorter than the fixed length of the ATM cell) is provided in an ATM cell to reduce the time necessary to assemble the ATM cell.
When such a short cell is used, an ATM switch is required to enable switching the short cell so that the short cells multiplexed in one ATM cell or two consecutive ATM cells can be switched. Hence, a conventional ATM switch cannot switch the short cells. However, it is economically advantageous to utilize a conventional ATM switch if the conventional ATM switch can be modified so as to switch the short cells. If the conventional ATM switch is used, it will be necessary to convert an ATM cell in which a short cell is multiplexed into a standard ATM cell. It is required that a device which processes information concerning the short cells be capable of extracting only a short cell relating to a call to be processed from the ATM cells in which the short cells are multiplexed.
FIG. 1 is a diagram shown a format of the ATM cell and a format of the short cell. In the following description, the term "ATM cell" denotes the standard ATM cell having a fixed length of 53 bytes (octets). The ATM cell consists of a payload field of 48 bytes, and a header (ATM cell header) of 5 bytes. The payload is used to store user information (data), and the header is used to store various control information. The header includes information PTI (Payload Type Identifier), CLP (Cell Loss Priority) and HEC (Header Error Control).
The short cell includes a short cell header (which can be referred to as a control information field (CIF), and a short-cell payload field. The short cell is allowed to have an arbitrary length. For example, the short cell header consists of 2 bytes, and includes information concerning a connection identifier (which is also called a logical link number (LLN)), a length identification (LI), and spare (reserved) bits. Although not shown in FIG. 1, the short cell has an error correction field (ECF). The length of the payload field of the short cell is indicated by the length indication LI.
FIG. 2 shows an arrangement in which user information to be transferred using short cells (to be provided in the short-cell payload area) extends over two consecutive ATM cells. Data #1 of user #2 extend over two consecutive cells. Hence, the logical link number LLN of the short cell in the ATM cell which is illustrated on the left side and is used to transfer information #1 of user #2 is the same as that of the short cell in the ATM cell which is illustrated on the right side and is used to transfer information #1 of user #2 (LLN=2).
FIG. 3 is a block diagram of a conventional cell assembly and multiplexing device having the function of assembling the short cells. The structure shown in FIG. 3 is obtained by applying the conventional assembling and multiplexing method for the standard ATM cells to the assembling and multiplexing of the short cells without a substantial modification. There are provided input lines #1-#4. Input information (such as voice packets) transferred over input lines #1-#3 is assembled into short cells. The short cells on the input lines #1-#3 are multiplexed to form the ATM cell (standard ATM cell), which is then multiplexed with input information received via the input line #4.
More particularly, short cell assembly parts 10.sub.1, 10.sub.2 and 10.sub.3 are provided in the input lines #1-#3, and assign short cell headers CIF to respective input information. The short cell assembly parts 10.sub.1, 10.sub.2 and 10.sub.3 respectively have buffer memories used to buffer input information to be transferred. A short cell multiplexer 11 multiplexes the short cells from the short cell assembly parts 10.sub.1 -10.sub.3, and outputs multiplexed short cells to a single line. The short cell multiplexer 11 has buffer memories respectively provided to the input lines #1-#3, which respectively buffer the short cells in order to allow a selector provided therein to select one of the short cells from the short cell assembly parts 10.sub.1 -10.sub.3.
A standard ATM cell assembly part 12 assemblies the received short cells into the ATM cells each having the 48-byte payload field, and adds the 5-byte ATM header to each ATM cell. A buffer memory provided in the standard cell assembly part 12 is used to buffer the short cells to enable the above operation of the part 12.
A standard cell multiplexer 13 selectively outputs the ATM cells from the part 12 and a buffer memory 10.sub.4 provided to the input line #4. This operation of the multiplexer 13 can be realized by using buffer memories respectively provided to the part 12 and the buffer memory 10.sub.4 and a selector.
The structure shown in FIG. 3 has a disadvantage in that input information transferred over the input lines #1-#3 passes through four stages of the buffer memories until it is output to the output line extending from the standard cell multiplexer 13. For example, input information on the input line #1 are buffered in the buffer memories of the short cell assembly part 10.sub.1, the short cell multiplexer 11, the standard cell assembly part 12 and the standard cell multiplexer 13 in this order. The structure having the four stages of buffer memories has a large hardware scale.
Further, there is nothing which makes it possible to extract the short cells from the multiplexed ATM cells. Hence, it is impossible to employ multiplexing and demultiplexing of the short cells in practical systems.